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MC33762 Dual Ultra Low-Noise Low Dropout Voltage Regulator with 1.0 V ON/OFF Control
The MC33762 is a dual Low DropOut (LDO) regulator featuring excellent noise performances. Thanks to its innovative design, the circuit reaches an impressive 40 VRMS noise level without an external bypass capacitor. Housed in a small 8 package, it represents the ideal designer's choice when space and noise are at premium. The absence of external bandgap capacitor accelerates the response time to a wake-up signal and keeps it within 40 s, making the MC33762 as a natural candidate for portable applications. The MC33762 also hosts a novel architecture which prevents excessive undershoots in the presence of fast transient bursts, as in any bursting systems. Finally, with a static line regulation better than -75 dB, it naturally shields the downstream electronics from choppy lines.
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8 1 Micro8t DM SUFFIX CASE 846A
* Nominal Output Current of 80 mA with a 100 mA Peak Capability * Ultra-Low Noise: 150 nV/Hz @ 100 Hz, 40 VRMS * * * * * * * * *
100 Hz-100 kHz Typical, Iout = 60 mA, Co = 1.0 F Fast Response Time from OFF to ON: 40 s Typical Ready for 1.0 V Platforms: ON with a 900 mV High Level Typical Dropout of 90 mV @ 30 mA, 160 mV @ 80 mA Ripple Rejection: 70 dB @ 1.0 kHz 1.5% Output Precision @ 25C Thermal Shutdown Vout Available at 2.5 V, 2.8 V, and 3.0 V Separate Dice for Each Regulator Provides Maximum Isolation Between Regulators Operating Range from -40 to +85C
PIN CONFIGURATION AND MARKING DIAGRAM
Gnd1 1 xxxx YWW (Top View) xxxx = Version Y = Year WW = Work Week En1 2 Gnd2 3 En2 4
8 Vout1 7 VCC1 6 Vout2 5 VCC2
Applications
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet.
* Noise Sensitive Circuits: VCOs RF Stages, etc. * Bursting Systems (TDMA Phones) * All Battery Operated Devices
(c) Semiconductor Components Industries, LLC, 2003
1
July, 2003 - Rev. 4
Publication Order Number: MC33762/D
MC33762
7 Thermal Shutdown VCC1
EN1
2
On/Off Band Gap Reference
8 *Current Limit *Antisaturation Protection *Load Transient Improvement
Vout
GND1 EN2
1
4
On/Off Band Gap Reference
5 Thermal Shutdown
VCC2
6 *Current Limit *Antisaturation Protection *Load Transient Improvement
Vout
GND2
3
Figure 1. Simplified Block Diagram
PIN FUNCTION DESCRIPTIONS
Pin # 1 2 3 4 5 6 7 8 Pin Name Gnd1 En1 Gnd2 En2 Vcc2 Vout2 Vcc1 Vout1 Function Ground of the 1st LDO Enables the 1st LDO Ground of the 2nd LDO Enables the 2nd LDO 2nd LDO Vcc pin Shuts or wakes-up the IC 1st LDO Vcc pin Delivers the output voltage A 900 mV level on this pin is sufficient to start this LDO. A 150 mV shuts it down. This pin brings the power to the 1st LDO and requires adequate decoupling. This pin requires a 1.0 F output capacitor to be stable. This pin brings the power to the 1st LDO and requires adequate decoupling. This pin requires a 1.0 F output capacitor to be stable. A 900 mV level on this pin is sufficient to start this LDO. A 150 mV shuts it down. Description
MAXIMUM RATINGS
Value Rating Power Supply Voltage ESD Capability, HBM Model ESD Capability, Machine Model Maximum Power Dissipation NW Suffix, Plastic Package Thermal Resistance Junction-to-Air Operating Ambient Temperature Maximum Junction Temperature (Note 1) Maximum Operating Junction Temperature (Note 2) Storage Temperature Range 1. Internally limited by shutdown. 2. Specifications are guaranteed below this value. Pin # 1 All Pins All Pins - - - - - - Symbol Vin - - PD RqJ-A TA TJmax TJ Tstg Min - - - - - - - - - Max 12 1.0 200 Internally Limited 240 -40 to +85 150 125 -60 to +150 Unit V kV V W C/W C C C C
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MC33762
ELECTRICAL CHARACTERISTICS
(For typical values TA = 25C, for min/max values TA = -40C to +85C, max TJ = 125C unless otherwise noted) Characteristics Pin # Symbol Min Typ Max Unit
Logic Control Specifications
Input Voltage Range ON/OFF Input Resistance (all versions) ON/OFF Control Voltages (Note 3) Logic Zero, OFF State, IO = 50 mA Logic One, ON State, IO = 50 mA 2-4 2-4 2-4 VON/OFF RON/OFF VON/OFF - 900 - - 150 - 0 - - 250 Vin - V kW mV
Currents Parameters
Current Consumption in OFF State (all versions) OFF Mode Current: Vin = Vout + 1.0 V, IO = 0, VOFF = 150 mV Current Consumption in ON State (all versions) ON Mode Current: Vin = Vout + 1.0 V, IO = 0, VON = 3.5 V Current Consumption in ON State (all versions), ON Mode Saturation Current: Vin = Vout - 0.5 V, No Output Load Current Limit Vin = Voutnom + 1.0 V, Output is brought to Voutnom - 0.3 V (all versions) - - - - IQOFF IQON IQSAT IMAX - - - 100 0.1 180 800 180 2.0 - - - mA mA mA mA
Output Voltages
Vout + 1.0 V < Vin < 6.0 V, TA = 25C, 1.0 mA < Iout < 80 mA 2.5 V 2.8 V 3.0 V 3.3 V 3.6 V Other Voltages up to 5.0 V Available in 50 mV Increment Steps Vout + 1.0 V < Vin < 6.0 V, TA = -40C to +85C, 1.0 mA < Iout < 80 mA 2.5 V 2.8 V 3.0 V 3.3 V 3.6 V Other Voltages up to 5.0 V Available in 50 mV Increment Steps 5-7 5-7 5-7 5-7 5-7 5-7 5-7 5-7 5-7 5-7 5-7 5-7 Vout Vout Vout Vout Vout Vout Vout Vout Vout Vout Vout Vout 2.462 2.758 2.955 3.250 3.546 -1.5 2.425 2.716 2.91 3.201 3.492 -3.0 2.5 2.8 3.0 3.3 3.6 X 2.5 2.8 3.0 3.3 3.6 X 2.537 2.842 3.045 3.349 3.654 +1.5 2.575 2.884 3.090 3.399 3.708 +3.0 V V V V V % V V V V V %
Line and Load Regulation, Dropout Voltages
Line Regulation (all versions) Vout + 1.0 V < Vin < 12 V, Iout = 80 mA Load Regulation (all versions) Vin = Vout + 1.0 V, Cout = 1.0 mF, Iout = 1.0 to 80 mA Dropout Voltage (all versions) (Note 3) Iout = 30 mA Iout = 60 mA Iout = 80 mA 3. Voltage slope should be greater than 2.0 mV/ms 5-7 5-7 Regline Regload - - - - 20 40 mV mV mV 5-7 5-7 5-7 Vin-Vout Vin-Vout Vin-Vout - - - 90 140 160 150 200 250
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MC33762
ELECTRICAL CHARACTERISTICS (continued)
(For typical values TA = 25C, for min/max values TA = -40C to +85C, max TJ = 125C unless otherwise noted) Characteristics Pin # Symbol Min Typ Max Unit
Dynamic Parameters
Ripple Rejection (all versions) Vin = Vout + 1.0 V + 1.0 kHz 100 mVpp Sinusoidal Signal Output Noise Density @ 1.0 kHz RMS Output Noise Voltage (all versions) Cout = 1.0 mF, Iout = 50 mA, F = 100 Hz to 1.0 MHz Output Rise Time (all versions) Cout = 1.0 mF, Iout = 50 mA, 10% of Rising ON Signal to 90% of Nominal Vout 5-7 5-7 5-7 5-7 Ripple - Noise trise - - - - -70 150 35 40 - - - - dB nV/ Hz mV ms
Thermal Shutdown
Thermal Shutdown (all versions) - - - - 125 C
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MC33762
DEFINITIONS
Load Regulation Line Regulation
The change in output voltage for a change in output current at a constant chip temperature.
Dropout Voltage
The input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 100 mV below its nominal value (which is measured at 1.0 V differential value). The dropout level is affected by the chip temperature, load current and minimum input supply requirements.
Output Noise Voltage
The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. One usually distinguishes static line regulation or DC line regulation (a DC step in the input voltage generates a corresponding step in the output voltage) from ripple rejection or audio susceptibility where the input is combined with a frequency generator to sweep from a few hertz up to a defined boundary while the output amplitude is monitored.
Thermal Protection
This is the integrated value of the output noise over a specified frequency range. Input voltage and output current are kept constant during the measurement. Results are expressed in VRMS.
Maximum Power Dissipation
Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 125C, the regulator turns off. This feature is provided to prevent catastrophic failures from accidental overheating.
Maximum Package Power Dissipation
The maximum total dissipation for which the regulator will operate within its specs.
Quiescent Current
The quiescent current is the current which flows through the ground when the LDO operates without a load on its output: internal IC operation, bias etc. When the LDO becomes loaded, this term is called the Ground current. It is actually the difference between the input current (measured through the LDO input pin) and the output current.
The maximum power package power dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125C. Depending on the ambient temperature, it is possible to calculate the maximum power dissipation and thus the maximum available output current.
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MC33762
Characterization Curves
Curves are Common to Both Regulators
4.5 QUIESCENT CURRENT (m A) 100 4.0 GROUND CURRENT (mA) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 20 40 60 OUTPUT CURRENT (mA) 80 -40C 25C 85C
185
180
175
170
165 -60
-40
-20 0 20 40 60 AMBIENT TEMPERATURE (C)
80
100
Figure 2. Ground Current versus Output Current
200 85C OUTPUT VOLTAGE (V) DROPOUT (mV) 150 25C -40C 100 2.805 2.800 2.795 2.790 2.785 2.780 0 0 20 60 40 OUTPUT CURRENT (mA) 80 100 2.775 0
Figure 3. Quiescent Current versus Temperature
85C 40C
25C 0C -20C -40C 20 40 60 OUTPUT CURRENT (mA) 80 100
50
Figure 4. Dropout versus Output Current
Figure 5. Output Voltage versus Output Current
180 160 DROPOUT VOLTAGE (mV) 140 120 100 80 60 40 20 0 -60 -40 -20 20 40 0 TEMPERATURE (C) 1.0 mA 60 80 100 30 mA 80 mA 60 mA
Figure 6. Dropout versus Temperature
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MC33762
APPLICATION HINTS
Input Decoupling Protections
As with any regulator, it is necessary to reduce the dynamic impedance of the supply rail that feeds the component. A 1.0 F capacitor either ceramic or tantalum is recommended and should be connected close to the MC33762 package. Higher values will correspondingly improve the overall line transient response.
Output Decoupling
Thanks to a novel concept, the MC33762 is a stable component and does not require any specific Equivalent Series Resistance (ESR) neither a minimum output current. Capacitors exhibiting ESRs ranging from a few mW up to 3.0 W can thus safely be used. The minimum decoupling value is 1.0 F and can be augmented to fulfill stringent load transient requirements. The regulator accepts ceramic chip capacitors as well as tantalum devices.
Noise Performances
The MC33762 hosts several protections, giving natural ruggedness and reliability to the products implementing the component. The output current is internally limited to a maximum value of 180 mA typical while temperature shutdown occurs if the die heats up beyond 125C. These values let you assess the maximum differential voltage the device can sustain at a given output current before its protections come into play. The maximum dissipation the package can handle is given by:
T *T A P max + Jmax R qJA
If TJmax is limited to 125C, then the MC33762 can dissipate up to 395 mW @ 25C. The power dissipated by the MC33762 can be calculated from the following formula:
Ptot + V in I (I ) ) V * V out gnd out in I out
Unlike other LDOs, the MC33762 is a true low-noise regulator. Without the need of an external bypass capacitor, it typically reaches the incredible level of 40 VRMS overall noise between 100 Hz and 100 kHz. To give maximum insight on noise specifications, ON Semiconductor includes spectral density graphics. The classical bypass capacitor impacts the start-up phase of standard LDOs. However, thanks to its low-noise architecture, the MC33762 operates without a bypass element and thus offers a typical 40 s start-up phase.
or
Vin max + Ptot ) V out I gnd ) I out I out
If a 80 mA output current is needed, the ground current is extracted from the data-sheet curves: 4.0 mA @ 80 mA. For a half 2.8 V MC33762 (2.8 V) operating at 25C, the maximum input voltage will then be 7.3 V.
Typical Applications
The following picture portrays the typical application of the MC33762.
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MC33762
Input
1 2 3 4 8 7 6 5
Output 1 Output 2
MC33762 + C3 1.0 mF Regulator 1 R1 100 k Regulator 2 R2 100 k + + C1 C2 1.0 mF 1.0 mF
On/Off
On/Off
Figure 7. A Typical Application Schematic
As for any low noise designs, particular care has to be taken when tackling Printed Circuit Board (PCB) layout. Connections shall be kept short and wide. Layout example
as given in the MC33761 application hints can be used as a starting basis.
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MC33762
Understanding the Load Transient Improvement The MC33762 features a novel architecture which allows the user to easily implement the regulator in burst systems where the time between two current shots is kept very small. The quality of the transient response time is related to many parameters, among which the closed-loop bandwidth with the corresponding phase margin plays an important role. However, other characteristics also come into play like the series pass transistor saturation. When a current perturbation suddenly appears on the output, e.g. a load increase, the error amplifier reacts and actively biases the PNP transistor. During this reaction time, the LDO is in open-loop and the output impedance is rather high. As a result, the voltage brutally drops until the error amplifier effectively closes the loop and corrects the output error. When the load disappears, the opposite phenomenon takes place with a positive overshoot. The problem appears when this overshoot decays down to the LDO steady-state value. During this decreasing phase, the LDO stops the PNP bias and one can consider the LDO asleep (Figure 8). If by misfortune a current shot appears, the reaction time is incredibly lengthened and a strong undershoot takes place. This reaction is clearly not acceptable for line sensitive devices, such as VCOs or other Radio-Frequency parts. This problem is dramatically exacerbated when the output current drops to zero rather than a few mA. In this later case, the internal feedback network is the only discharge path, accordingly lengthening the output voltage decay period (Figure 9). The MC33762 cures this problem by implementing a clever design where the LDO detects the presence of the overshoot and forces the system to go back to steady-state as soon as possible, ready for the next shot. Figure 10 and 11 show how it positively improves the response time and decreases the negative peak voltage.
Figure 8. A Standard LDO Behavior when the Load Current Disappears
Figure 9. A Standard LDO Behavior when the Load Current Appears in the Decay Zone
Figure 10. Without Load Transient Improvement
Figure 11. MC33762 with Load Transient Improvement
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MC33762
MC33762 Has a Fast Start-Up Phase Thanks to the lack of bypass capacitor the MC33762 is able to supply its downstream circuitry as soon as the OFF to ON signal appears. In a standard LDO, the charging time of the external bypass capacitor hampers the response time. A simple solution consists in suppressing this bypass element but, unfortunately, the noise rises to an unacceptable level. MC33762 offers the best of both worlds since it no longer includes a bypass capacitor and starts in less than 40 s typically (Repetitive at 200 Hz). It also ensures an incredible low-noise level of 40 VRMS 100 Hz-100 kHz. The following picture details the typical 33762 startup phase.
Figure 12. Repetitive Start-Up Waveforms
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MC33762
TYPICAL TRANSIENT RESPONSES
Figure 13. Output is Pulsed from 2.0 mA to 80 mA
Figure 14. Discharge Effects from 0 to 40 mA
Figure 15. Load Transient Improvement Effect
Figure 16. Load Transient Improvement Effect
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MC33762
TYPICAL TRANSIENT RESPONSES
250 Vin = Vout + 1.0 V TA = 25C Cout = 1.0 mF IO = 50 mA 10 mA 100 RMS Noise, IO = 10 mA: 20 Hz - 100 kHz: 29 mV 20 Hz - 1.0 MHz: 31 mV 1,000 10,000 100,000 f, FREQUENCY (Hz) 1,000,000 RMS Noise, IO = 50 mA: 20 Hz - 100 kHz: 27 mV 20 Hz - 1.0 MHz: 30 mV
200 nV/sqrt Hz
150
50
0 100
Figure 17. MC33762 Typical Noise Density Performance
0 -10 -20 -30 Z O (OHMS) -40 (dB) -50 -60 -70 -80 -90 -100 100 1,000 10,000 100,000 f, FREQUENCY (Hz) 1,000,000 10 mA Vin = VO + 1.0 V TA = 25C Cout = 1.0 mF IO = 50 mA
3.5 3.0 2.5 2.0 1.5 1.0 0.5 20 mA 0 100 1,000 100,000 10,000 f, FREQUENCY (Hz) 1,000,000 80 mA 10 mA IO = 1.0 mA
Figure 18. MC33762 Typical Ripple Rejection Performance
Figure 19. Output Impedance Plot Cout = 1.0 mF, Vin = Vout + 1.0 V
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MC33762
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self-align when subjected to a solder reflow process.
0.041 1.04
0.208 5.28
0.126 3.20
0.015 0.38
0.0256 0.65
inches mm
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MC33762
ORDERING INFORMATION
Part Number MC33762DM-2525R2 MC33762DM-2828R2 MC33762DM-3030R2 Voltage Output 2.5 V & 2.5 V 2.8 V & 2.8 V 3.0 V & 3.0 V Marking 2525 2828 3030 Package Micro8 Micro8 Micro8 Shipping 4000 Units / Tape & Reel 4000 Units / Tape & Reel 4000 Units / Tape & Reel
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MC33762
PACKAGE DIMENSIONS
Micro8 PLASTIC PACKAGE CASE 846A-02 ISSUE F
-A-
K
-B-
PIN 1 ID
G D 8 PL 0.08 (0.003)
M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A-01 OBSOLETE, NEW STANDARD 846A-02. DIM A B C D G H J K L MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 --- 1.10 0.25 0.40 0.65 BSC 0.05 0.15 0.13 0.23 4.75 5.05 0.40 0.70 INCHES MIN MAX 0.114 0.122 0.114 0.122 --- 0.043 0.010 0.016 0.026 BSC 0.002 0.006 0.005 0.009 0.187 0.199 0.016 0.028
TB
S
A
S
-T- PLANE 0.038 (0.0015) H
SEATING
C J L
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MC33762
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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MC33762/D

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